Welcome to Verilog-to-Routing’s documentation!¶
For more information on the Verilog-to-Routing (VTR) project see VTR and VTR CAD Flow.
For documentation and tutorials on the FPGA architecture description language see: FPGA Architecture Description.
For more specific documentation about VPR see VPR.
Quick Start
Development
- Developer Guide
- Contribution Guidelines
- Commit Procedures
- Commit Messages and Structure
- Code Formatting
- Running Tests
- Evaluating Quality of Result (QoR) Changes
- Adding Tests
- Debugging Aids
- Speeding up the edit-compile-test cycle
- Speeding Compilation
- Profiling VTR
- External Subtrees
- Finding Bugs with Coverity
- Release Procedures
- Sphinx API Documentation for C/C++ Projects
- Documenting VTR Code with Doxygen
- Developer Tutorials
- VTR Support Resources
- VTR License
- VTR Change Log